Monday, January 5th, 2009
FSI International, Inc. (Nasdaq: FSII) announced December 23, 2008 that it has received an order for it’s new ORION® single wafer cleaning platform after a beta evaluation by a major semiconductor manufacturer. The tool will be used for resist strip in 32nm metal interconnect modules, using FSI’s proprietary “ViPR” extension of the classic “piranha” (a.k.a., sulfuric-peroxide mixture or “SPM”) chemistry.
FSI has been pushing the envelope with wet cleans for many years, and I’ve talked with CTO Jeff Butterbaugh many times about this application. Generally speaking, interconnect cleans have always allowed for more material losses than transistor cleans, and so had been considered as “less critical.” Being less critical, single-wafer process control was not considered as essential, so batch tools have dominated interconnect cleans. However, ever reducing process margins, material loss and galvanic corrosion in copper interconnects now suggest single-wafer control.
“This order is important to us on many levels,” said Don Mitchell, FSI’s president and CEO. “It validates the critical capabilities of the ORION for 32nm applications. It also demonstrates this customer’s conviction that those capabilities add sufficient value that even in a deep industry down-cycle, manufacturers are willing to invest in innovative technology, not only to prepare for the future, but also to realize current gains.”
The tool incorporates many of FSI’s core technologies: in-line chemical blending and control, energetic aerosol chemical and water delivery, and recipe-driven procedures. Its modular design accommodates multiple chamber types and permits the addition of modules to increase maximum throughput. The ORION’s unique closed-chamber design also permits the use of volatile, highly-reactive chemistries for single step, all wet stripping of the highly implanted photoresist created during the fabrication of 32nm devices. By eliminating ashing, it not only reduces material loss but also decreases the cycle time, process complexity and the number of tools and process steps. –E.K.
Tags: 32nm, beta, clean, interconnect, Semiconductor, single-wafer, SPM, ViPR