Posts Tagged ‘IC’

Wednesday, June 15th, 2011

Ultra-pure steam can improve the ultimate efficiency of PV cells by removing contaminants, as quantified by Fraunhofer ISE using Rasirc Steamer sub-systems.

Tuesday, April 5th, 2011

Prof. Masato Shibuya was awarded the JSAP Takuma Award 2011 for invention of the phase-shift mask (PSM) and opening the field of advanced lithography, as reported by independent PSM inventor Marc Levenson.

Monday, March 21st, 2011

SPIE Advanced Lithography 2011 showed few new tools or techniques, but many new materials and integration tricks to extend 193i into double-patterning for IC HVM, while EUV and DSA developments continue according to expert Dr. M. David Levenson of BetaSights.

Friday, January 7th, 2011

IEDM 2010 showed evolutions of NAND Flash with ALD IPD and ECC to 1Xnm node processing, and embedded-DRAM (eDRAM) capacitor stacks in porous low-k, meaning mainstream memory technologies will continue to dominate commercial volumes.

Tuesday, December 21st, 2010

Graphene—the 2D hexagonal lattice of carbon—has been under investigation as a new material for electronics applications due to it’s high mobility and other unique properties. At IEDM this year, an entire session (#23) was devoted to showcasing graphene devices, and to sharing the latest processing tricks to grow and (sometimes) transfer the single-atomic-layer of carbon […]

Tuesday, December 14th, 2010

Through-silicon vias (TSV) by IBM and Semtech for ADC/DSP solutions use copper and deep-trench capacitors for RF applications; IEDM 2010 papers show TSV in active chips progressing slowly.

Monday, November 29th, 2010

Applied Materials lauches Centris platform for AdvantEdge MESA etch chambers, claiming 180 wph throughput, 0.8nm CD, and 30% lower CoO. Also releases new ultra HDP Silvia etch chamber for Centura, claiming $10 per wafer TSV etch.

Friday, November 26th, 2010

Qcept Technologies’ ChemitriQ5000 may help GlobalFoundries vs. TSMC in gate-first HKMG integration for 32nm foundry customers with fab metrology for control of yield excursions

Monday, November 8th, 2010

Xilinx 28nm FPGA Virtex-7 uses TSMC 65nm multi-level-metal (MLM) and through-silicon-via (TSV) Si-interposer for 2M gate and ARM-core integration product family.

Monday, October 18th, 2010

IEDM 2010 best hints at 22nm node fab tech alternate-channel materials, dual- and tri-gate transistors, and RF, MEMS, lab-on-chip, graphene, analog, memory ReRAM results.