Posts Tagged ‘dual-gate’

Monday, October 18th, 2010

IEDM 2010 best hints at 22nm node fab tech alternate-channel materials, dual- and tri-gate transistors, and RF, MEMS, lab-on-chip, graphene, analog, memory ReRAM results.

Friday, January 22nd, 2010

The IEEE’s International Electron Devices Meeting (IEDM) is still the place to see the latest micro- and nano-electronics research targeting commercial markets. On December 8, 2009, French researchers from Leti/Minatec showed “3D sequential CMOS integration” as <600°C processing of PFETs using a (110) orientation FDSOI layer that was transferred on top of NFETs made using […]