Posts Tagged ‘ALD’

Wednesday, June 15th, 2011

Ultra-pure steam can improve the ultimate efficiency of PV cells by removing contaminants, as quantified by Fraunhofer ISE using Rasirc Steamer sub-systems.

Monday, March 21st, 2011

SPIE Advanced Lithography 2011 showed few new tools or techniques, but many new materials and integration tricks to extend 193i into double-patterning for IC HVM, while EUV and DSA developments continue according to expert Dr. M. David Levenson of BetaSights.

Friday, January 7th, 2011

IEDM 2010 showed evolutions of NAND Flash with ALD IPD and ECC to 1Xnm node processing, and embedded-DRAM (eDRAM) capacitor stacks in porous low-k, meaning mainstream memory technologies will continue to dominate commercial volumes.

Wednesday, August 25th, 2010

For 32nm and 22nm node ICs, Applied Materials’ FCVD and Novellus Systems’ CFD technologies provide gapfill, sidewall spacers, and conformal oxides for logic and NAND, plus SSDP litho.

Monday, July 19th, 2010

Soft plasmas for monolayer etching by Ed Korczynski at NCCAVS PAG meeting at SEMICON/West 2010, including TEL Tactras RLSA and AMAT AdvantEdge Mesa for HKMG 32nm, STI, and bWL etches.

Monday, July 5th, 2010

ALD/CVD systems for new materials R&D by Altatech Semiconductor sold to Fraunhofer IZM ASSID and ENAS for 3DIC and high mobility research using liquid injection of precursors.

Wednesday, August 12th, 2009

At the SEMICON West 2009 Device Scaling TechXPOT, moderated by this editor, SEMATECH’s Ray Jammy reviewed the latest results in scaling CMOS transistors. “We are litererally running out of atoms,” explained Jammy. “You can see the number of atoms in a gate dielectric.” When you have such thin layers, how do you control device parameters? […]

Monday, February 9th, 2009

Toshiba claims the prototype of a new Ferroelectric Random Access Memory (FRAM) cell sized at 15F2 acheives read and write speed of 1.6-GB/s using a 130nm node CMOS process. The company will show details of this high bandwidth 128Mb non-volative RAM technology at the International Solid-State Circuits Conference 2009 (ISSCC 2009; Session 27.5) in San […]

Thursday, January 29th, 2009

Aixtron and Ovonyx announced a JDP for Atomic Vapor Deposition (AVD®) process technology to push scaling of next-generation phase change memory (PCM) products. Since it is expected to replace current high-density memory, PCM cells must be made dense and so companies like Samsung (Ref: BetaSights Newsletter 0001) and Numonyx require CVD-like processes for gap-fill instead […]

Thursday, January 15th, 2009

As SEMI’s SMC today, Raymond Roberge, SVP and CTO of Praxair Electronics, proposed a pragmatic new collaboration model for electronic materials R&D. Semiconductor fab process materials TAM for 2008 was ~$10B, yet materials suppliers now question their ongoing profitability. “Certainly the 300mm shift has resulted in productivity advances for IDMs at the expense of materials […]