Posts Tagged ‘NAND’

Friday, January 7th, 2011

IEDM 2010 showed evolutions of NAND Flash with ALD IPD and ECC to 1Xnm node processing, and embedded-DRAM (eDRAM) capacitor stacks in porous low-k, meaning mainstream memory technologies will continue to dominate commercial volumes.

Tuesday, September 7th, 2010

HP and Hynix JVA for ReRAM chips, based on HP titania memristor as covered by BetaSights April 2010, with R&D fab in Korea to start work on integration on 300mm silicon wafers for 2013 IC chips

Wednesday, August 25th, 2010

For 32nm and 22nm node ICs, Applied Materials’ FCVD and Novellus Systems’ CFD technologies provide gapfill, sidewall spacers, and conformal oxides for logic and NAND, plus SSDP litho.

Tuesday, March 3rd, 2009

IEDM 2008 included the unveiling of Schiltron’s (Session 34.6) revolutionary 3-D high density Flash technology that combines the smallest TFTs to date in series strings of up to 64 cells. The unique architecture effectively removes pass disturbs allowing large worst-case string currents and resulting in thinner tunnel oxides, lower erase voltages, and higher endurance than […]

Friday, January 16th, 2009

At SEMI’s SMC yesterday, Sung Wook Park, executive vice president and general manager of Hynix Semiconductor, provided a keynote address on the materials needs for mainstream memory chips over the next decade. DRAMs will likely turn into STTRAMs, and NAND Flash will probably be replaced by ReRAM (Ref: Ed’s Threads 080505). Combinatorial materials R&D company […]