Posts Tagged ‘IC’

Friday, August 21st, 2009

James Quinn, CEO of Replisaurus, has been very busy executing for the last few years to bring his vision of a new metallization technology to the IC fab industry. Targeting the formation of Cu interconnects for advanced packaging applications, Quinn has assembled a great team to work with CEA-Leti and other industrial partners on a […]

Monday, August 17th, 2009

Luminescent Technologies, Inc., a computational lithography company, has broadened its reach by announcing the industry’s first offline computational photomask inspection product (unofficially named LAIPH for Luminescent Automated Image Processing Hub). A “premier company in Asia” is the first customer to qualify the new computational defect review product in volume production. According to a Luminescent representative, […]

Wednesday, August 12th, 2009

At the SEMICON West 2009 Device Scaling TechXPOT, moderated by this editor, SEMATECH’s Ray Jammy reviewed the latest results in scaling CMOS transistors. “We are litererally running out of atoms,” explained Jammy. “You can see the number of atoms in a gate dielectric.” When you have such thin layers, how do you control device parameters? […]

Tuesday, August 4th, 2009

While EUV Lithography may now be inevitable, according to SEMATECH Program Manager Bryan Rice, it may not be indispensable. SEMICON West offered a snapshot of progress towards the 32nm, 22nm, and 16nm device nodes at the Device Scaling TechXPOT, and the industry appears to have patterning options even if EUV encounters further delay. Yan Borodovsky […]

Wednesday, July 22nd, 2009

At SEMICON West and Intersolar North America last week in San Francisco, crossing guards danced to keep the throngs away from the vehicles at the corner of 4th and Howard, as many people flowed back and forth between the shows co-located across 4th Street from each other. SEMICON West, down ~30% in size from last […]

Tuesday, July 7th, 2009

Applied Materials has extended physical vapor deposition (PVD) technology to be able to coat the sidewalls of 22nm node structures. “It’s been validated, it’s been shipped, and it’s been qualified in pilot lines for both logic and memory,” asserted Marek Radko, Applied Materials’ BEOL GPM Manager, in an exclusive interview with BetaSights. Separately, the company […]

Friday, May 8th, 2009

Today, Intel sponsored a history of the planar IC event at the Computer History Museum, in Mountain View, California. This, in the same week that the company pre-launches a new advertising campaign to try to position the company as “Sponsors of Tomorrow.” Based on the live event, the past was seriously wonderful. Based on these […]

Friday, May 1st, 2009

Leaving California for the first time, the 12th annual IEEE International Interconnect Technology Conference (IITC) will take place in Sapporo, Japan, June 1-3. With lithographic shrinks in 2D dimensions slowing, interconnects between chips in packages and in 3D stacks will be the driver for increased density and functionality in ICs. Thus, the more than 80 […]

Wednesday, April 29th, 2009

Thermal management of advanced ICs remains challenging, with models often failing to predict the heat flow through multiple films and interfaces. Advanced Thermal Solutions (ATS) of Norwood, Massachusetts (US) will provide a half-day of free, no-obligation use of its unique Thermal Characterization Laboratory to engineers who need to perform thermal testing of their heat sinks, […]

Thursday, April 23rd, 2009

Silicon Valley has certainly not been immune to the current economic conditions, with many companies announcing multiple rounds of layoffs and moving operations overseas. Yet for many it is still considered “the heart” of the high-tech industry. At today’s well-attended Silicon Valley Lunch Forum, organized by the Sales and Marketing Council of SEMI, three speakers […]