Posts Tagged ‘process’

Wednesday, August 26th, 2009

IMEC/F-IZM/SUSS/TM vs. SEMATECH/Leti/EVG/Brewer. The leading R&D consortia have aligned (pun intended) with leading equipment and materials suppliers to create ultra-thin silicon wafer handling technologies for 3D ICs. With the ability to shrink circuit dimensions in 2D becoming ever more difficult, most of the world’s IC fab leaders are evaluating the use of the 3rd dimension. […]

Tuesday, April 21st, 2009

IMEC has successfully transferred memory variability aware modeling (MemoryVAM), the first EDA tool for statistical memory analysis, to Samsung Electronics. The tool predicts yield loss of embedded SRAMs caused by the process variations of deep-submicron IC technologies. This may be the first proven design-for-manufacturing (DFM) tool to provide statistical analysis across degrees of abstraction from […]