Archive for the ‘Material’ Category

Monday, March 8th, 2010

This year’s plenary sessions of the SPIE Advanced Lithography Symposium exposed the complexities of patterning ICs in high-volume manufacturing (HVM) at the 22nm node and beyond. Steppers using 193nm ArF immersion (193i) will be extended using double-patterning (DP) schemes, since the extreme-ultra-violet litho (EUVL) infrastructure is again delayed. R&D to support DP integration has led […]

Saturday, February 20th, 2010

The SPIE’s 7th Frits Zernike Award for Advances in Optical Microlithography goes to M. David Levenson, BetaSights Litho & DFM Editor, in recognition of one of the most important developments in lithography resolution enhancement of the last twenty years, the phase shifting mask (PSM). About 30 years ago at the IBM San Jose Lab, Levenson […]

Friday, November 13th, 2009

Intermolecular, the company that brought combinatorial chemistry to semiconductor manufacturing R&D, has expanded its focus to look at ways to improve basic manufacturing processes for photovoltaic (PV) fabs. “I think that the PV devices of 10 years from now will look significantly different from those of today,” said Intermolecular vice president and general manager of […]

Friday, October 9th, 2009

Founded in 1984 with Flemish government support, IMEC has reached 25 years. To celebrate the organization’s accomplishments, BetaSights joined other industry media outlets attending a research review event in beautiful Leuven, Belgium. From 1999 to 2009 has been the “phase of international breakthrough” as described by current president Luc Van den hove. Working with OEMs […]

Wednesday, September 9th, 2009

After more than 5 years and US$500 million dollars invested, Nanosolar has emerged from secrecy to quell rumors that the company’s technology was all smoke and nanomirrors. This long-shot technology risk is now claimed to produce mean cell efficiencies of 11%, with a champion cell from a Gen3 line measured by NREL at 16%. The […]

Wednesday, August 26th, 2009

IMEC/F-IZM/SUSS/TM vs. SEMATECH/Leti/EVG/Brewer. The leading R&D consortia have aligned (pun intended) with leading equipment and materials suppliers to create ultra-thin silicon wafer handling technologies for 3D ICs. With the ability to shrink circuit dimensions in 2D becoming ever more difficult, most of the world’s IC fab leaders are evaluating the use of the 3rd dimension. […]

Friday, August 21st, 2009

James Quinn, CEO of Replisaurus, has been very busy executing for the last few years to bring his vision of a new metallization technology to the IC fab industry. Targeting the formation of Cu interconnects for advanced packaging applications, Quinn has assembled a great team to work with CEA-Leti and other industrial partners on a […]

Wednesday, August 12th, 2009

At the SEMICON West 2009 Device Scaling TechXPOT, moderated by this editor, SEMATECH’s Ray Jammy reviewed the latest results in scaling CMOS transistors. “We are litererally running out of atoms,” explained Jammy. “You can see the number of atoms in a gate dielectric.” When you have such thin layers, how do you control device parameters? […]

Tuesday, August 4th, 2009

While EUV Lithography may now be inevitable, according to SEMATECH Program Manager Bryan Rice, it may not be indispensable. SEMICON West offered a snapshot of progress towards the 32nm, 22nm, and 16nm device nodes at the Device Scaling TechXPOT, and the industry appears to have patterning options even if EUV encounters further delay. Yan Borodovsky […]

Wednesday, July 22nd, 2009

At SEMICON West and Intersolar North America last week in San Francisco, crossing guards danced to keep the throngs away from the vehicles at the corner of 4th and Howard, as many people flowed back and forth between the shows co-located across 4th Street from each other. SEMICON West, down ~30% in size from last […]