Archive for the ‘Equipment’ Category

Friday, September 18th, 2009

At SEMICON West this year, ASML announced tools that fleshed out their Holistic Lithography scheme introduced at SPIE’s Advanced Lithography Symposium in February of this year. The key idea of Holistic Lithography, according to Bert Koek, senior vice president of the applications products group at ASML, is integrating computational lithography, wafer printing, and process control […]

Wednesday, September 9th, 2009

After more than 5 years and US$500 million dollars invested, Nanosolar has emerged from secrecy to quell rumors that the company’s technology was all smoke and nanomirrors. This long-shot technology risk is now claimed to produce mean cell efficiencies of 11%, with a champion cell from a Gen3 line measured by NREL at 16%. The […]

Wednesday, August 26th, 2009

IMEC/F-IZM/SUSS/TM vs. SEMATECH/Leti/EVG/Brewer. The leading R&D consortia have aligned (pun intended) with leading equipment and materials suppliers to create ultra-thin silicon wafer handling technologies for 3D ICs. With the ability to shrink circuit dimensions in 2D becoming ever more difficult, most of the world’s IC fab leaders are evaluating the use of the 3rd dimension. […]

Friday, August 21st, 2009

James Quinn, CEO of Replisaurus, has been very busy executing for the last few years to bring his vision of a new metallization technology to the IC fab industry. Targeting the formation of Cu interconnects for advanced packaging applications, Quinn has assembled a great team to work with CEA-Leti and other industrial partners on a […]

Monday, August 17th, 2009

Luminescent Technologies, Inc., a computational lithography company, has broadened its reach by announcing the industry’s first offline computational photomask inspection product (unofficially named LAIPH for Luminescent Automated Image Processing Hub). A “premier company in Asia” is the first customer to qualify the new computational defect review product in volume production. According to a Luminescent representative, […]

Wednesday, August 12th, 2009

At the SEMICON West 2009 Device Scaling TechXPOT, moderated by this editor, SEMATECH’s Ray Jammy reviewed the latest results in scaling CMOS transistors. “We are litererally running out of atoms,” explained Jammy. “You can see the number of atoms in a gate dielectric.” When you have such thin layers, how do you control device parameters? […]

Tuesday, August 4th, 2009

While EUV Lithography may now be inevitable, according to SEMATECH Program Manager Bryan Rice, it may not be indispensable. SEMICON West offered a snapshot of progress towards the 32nm, 22nm, and 16nm device nodes at the Device Scaling TechXPOT, and the industry appears to have patterning options even if EUV encounters further delay. Yan Borodovsky […]

Thursday, July 30th, 2009

Evergreen Solar, the manufacturer of “String Ribbon” solar power products, announced it has finalized agreements with Jiawei Solarchina and the Wuhan government’s Hubei Science & Technology Investment Co., Ltd. (“HSTIC”) for the setup and operation of a new 100MW mc-Si panel fab. Factory construction has begun and the parties expect that wafer, cell, and panel […]

Wednesday, July 22nd, 2009

At SEMICON West and Intersolar North America last week in San Francisco, crossing guards danced to keep the throngs away from the vehicles at the corner of 4th and Howard, as many people flowed back and forth between the shows co-located across 4th Street from each other. SEMICON West, down ~30% in size from last […]

Friday, July 10th, 2009

Intersolar North America 2009, co-located with SEMICON West in San Francisco next week, will include a Solar Startups Forum on July 16 to showcase some new technologies that are now in beta tests in the field. Select companies will make in depth presentations and offer insight into the atmosphere and environment of the solar industry […]