Archive for the ‘Product’ Category
Friday, February 20th, 2009
As computational lithography has become big big business, the pioneering enterprises have been assimilated into larger organizations (KLA-Tencor for Finle and Synopsys for Sigma-C, to name two examples). Panoramic Technology, however, continues its independence, supplying trustworthy and up-to-date simulators to advanced lithographers for a decade. Past Panoramic products, however, employed an interface that was familiar […]
Independent computational lithography simulator
Tags: DUV, EUV, i193, IC, litho, model, OPC
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Thursday, February 19th, 2009
JSR announced today that it has entered into several joint development partnerships (JDP) with IBM to develop low-k dielectrics for 32nm and 22nm nodes of semiconductor technology. The companies will work on next generation materials JSR has had in development and commercial production, including low-k dielectrics and a broad range of photoresists. “This larger scale […]
JSR and IBM low-k JDPs for 32/22nm
Tags: 32nm, Cu, CVD, IC, litho, low-k, porous, resist, spin-on, ULK
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Wednesday, February 18th, 2009
For thick plating applications like copper pillar bump processing in semiconductor advanced packaging, Shin-Etsu MicroSi has introduced a positive tone, ultra-thick photoresist, SIPR-7126. The 7100 chemically amplified (CA) series has been in production for several years, and the SIPR-7126 has been optimized to reduce processing steps and improve removability in layers up to 100 µm […]
Shin-Etsu positive i-line resist 100 microns thick
Tags: bump, CA, i-line, IC, litho, resist, TMAH, TSV
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Tuesday, February 17th, 2009
Metrosol has joined SEMATECH’s Front End Process Technologies Program at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany to address metrology and data-analysis solutions for 45nm node and beyond IC fabs. The joint partnership will expand on current work to develop inline metrology techniques to monitor the thickness and composition […]
Metrosol joins SEMATECH for HKMG R&D at CNSE
Tags: 45nm, fab, high-k, HK, IC, metrology, MG, R&D
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Friday, February 13th, 2009
Evident Technologies has announced the issuance of US Patent No. 7,482,059 covering the ability to synthesize a quantum dot with a metal layer which dramatically enhances the brightness and stability of a semiconductor nanocrystal complex. This advance of semiconductor materials science relies on a relatively low-cost colloidal formation processing, instead of needing epitaxial lattice-matching or […]
Evident quantum dot fab IP
Tags: CIGS, dot, IC, III-V, IP, LED, patent, quantum
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Thursday, February 12th, 2009
CaliSolar is ramping production of upgraded metallurgical-grade silicon (UMG-Si) solar cells and has selected Eyelit’s manufacturing software suite to support its new fab next to its headquarters in Sunnyvale, California. CaliSolar is a private company claiming 15% conversion efficiency from cell made using 100% UMG-Si feedstock that undergoes purification at both the ingot and wafer […]
CaliSolar UMG-Si PV cells ramping
Tags: anneal, efficiency, etch, getter, MES, patent, PV, Si, UMG
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Wednesday, February 11th, 2009
At Levitronix’s Ultrapure Fluid Handling and Wafer Cleaning Conference on February 11th, Particle Measuring Systems reviewed the limits of being able to detect things we do not want to find in flowing fluids, as enabled by a new digital detector array they call NanoVision Technology. Steven Verhaverbeke, tool design expert for Applied Materials who presented […]
Plenty of pixels size particles
Tags: 45nm, analysis, control, IC, ITRS, metrology, particle, spec
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Tuesday, February 10th, 2009
CMP applications experts gathered in Santa Clara, California on February 10th to share their experience and expertise at the fifth annual seminar sponsored by Levitronix. Leading developers, manufacturers, and end-users of CMP discussed all aspects of the technology, and since Levitronix makes magnetic levitation (MagLev) pumps there were many thorough presentations on slurry distribution issues. […]
Levitronix seminar shows how to do CMP
Tags: analysis, CMP, fab, IC, metrology, slurry, yield
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Monday, February 9th, 2009
Toshiba claims the prototype of a new Ferroelectric Random Access Memory (FRAM) cell sized at 15F2 acheives read and write speed of 1.6-GB/s using a 130nm node CMOS process. The company will show details of this high bandwidth 128Mb non-volative RAM technology at the International Solid-State Circuits Conference 2009 (ISSCC 2009; Session 27.5) in San […]
Toshiba 128Mb FRAM using 15F2 cell
Tags: ALD, CMOS, FRAM, IC, memory, MOCVD, non-volatile
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Friday, February 6th, 2009
The SEMI PV Group today announced the release of its Global Photovoltaic (PV) Standards Roadmap Guidance Document, which identifies immediate opportunities for reducing cost and accelerating innovation in thin-film and crystalline silicon cell and module manufacturing through industry standards. This new roadmap confirms that major manufacturing cost savings are possible through standardizing wafer carriers and […]
SEMI PV standards roadmapped
Tags: cost, fab, management, PV, Si, solar, standards, thin-film
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