E-beam Initiative adds four members and starts on Design for E-beam (DFEB) for mask makng for ICs to reduce mask costs at 22nm and below.

HP and Hynix JVA for ReRAM chips, based on HP titania memristor as covered by BetaSights April 2010, with R&D fab in Korea to start work on integration on 300mm silicon wafers for 2013 IC chips

For 32nm and 22nm node ICs, Applied Materials’ FCVD and Novellus Systems’ CFD technologies provide gapfill, sidewall spacers, and conformal oxides for logic and NAND, plus SSDP litho.

Post-optical lithography (NGL) technologies EUV (EUVL), e-beam direct-write (EbDW), and nano-imprint (NIL) all need work as shown at SEMICON/West 2010, major costs limitations.

SEMICON/West 2010 lithography changes were slight, TEL showed quadruple-patterning with ALD sidewall spacers and tools, Nikon and ASML with IMEC also showed double-patterning

ALD/CVD systems for new materials R&D by Altatech Semiconductor sold to Fraunhofer IZM ASSID and ENAS for 3DIC and high mobility research using liquid injection of precursors.

Intel shows vertical integration pays off with air-gaps through manufacturing cost reduction in low-k dielectrics for 32nm and 22nm node IC interconnects.

HP Labs in Palo Alto has been leading the development of the “memristor,” and researchers there have finally discovered the underlying mechanism for the formation of devices that can function as memory cells, logic circuits, and potentially even real artificial intelligence (AI)! Disclosing these results in his plenary speech to the attendees at the Nanocontacts […]

The 2010 SPIE Advanced Lithography conference is where we first get glimpses of the future of nano-scale patterning technology for manufacturing. Sometimes, many fuzzy blobs come into focus as a picture in a single moment, and Yan Borodovsky of Intel showed how to do 22nm node litho the day before SPIE officially started. At both […]

The upcoming Spring Materials Research Society (MRS) Meeting in San Francisco will feature a separate “Nanocontact and Nanointerconnects Workshop” to explore the biggest secret about the smallest devices: for the near-term there’s nothing better than standard metal. The workshop will address both theoretical and experimental approaches to formation, carrier transport, and reliability, and so will […]